I spoke too soon. Earlier today I outlined AMD’s roadmap for 2010 - 2011. In 2011 AMD will introduce two next-generation microarchitectures: Bulldozer for the high end desktop and server space and Bobcat for the price/power efficient ultra mobile market. I originally said that AMD wasn’t revealing any more about its next-gen architectures, but AMD just proved me wrong as they unveiled the first block diagrams of both cores.

First up, Bulldozer. I hinted at the architecture in this afternoon’s article:

“A major focus is going to be improving on one of AMD’s biggest weaknesses today: heavily threaded performance. Intel addresses it with Hyper Threading, AMD is throwing a bit more hardware at the problem. The dual integer clusters you may have heard of are the route AMD is taking...”

And here’s the block diagram:


Bulldozer: AMD's Latest Leap Forward, will it be another K8 to Intel's Sandy Bridge?

This is a single Bulldozer core, but notice that it has two independent integer clusters, each with its own L1 data cache. The single FP cluster shares the L1 cache of the two integer clusters.

Within each integer “core” are four pipelines, presumably half for ALUs and half for memory ops. That’s a narrower width than a single Phenom II core, but there are two integer clusters on a single Bulldozer core.

Bulldozer will also support AVX, hinted at by the two 128-bit FMAC units behind the FP scheduler. AMD is keeping the three level cache hierarchy of the current Phenom II architecture.

A single Bulldozer core will appear to the OS as two cores, just like a Hyper Threaded Core i7. The difference is that AMD is duplicating more hardware in enabling per-core multithreading. The integer resources are all doubled, including the schedulers and d-caches. It’s only the FP resources that are shared between the threads. The benefit is you get much better multithreaded integer performance, the downside is a larger core.

Doubling the integer resources but not the FP resources works even better when you look at AMD’s whole motivation behind Fusion. Much heavy FP work is expected to be moved to the GPU anyway, there’s little sense in duplicating FP hardware on the Bulldozer core when it will eventually have a fully capable GPU sitting on the same piece of silicon. While the first incarnation of Bulldozer, the Zambezi CPU, won't have an on-die GPU, presumably future APUs will use the new core. In those designs the Bulldozer cores and the GPU will most likely even share the L3 cache. It’s really a very elegant design and the basis for what AMD, Intel and NVIDIA have been talking about for years now. The CPU will do what it does best while the GPU does what it is good at.

Fascinating.

AMD’s Next-Generation Ultramobile Core: Bobcat

Next up is Bobcat:

AMD says that a single Bobcat is capable of scaling down to less than one watt of power. Typically a single microarchitecture is capable of efficiently scaling to an order of magnitude of TDP. If Bobcat can go low as 0.5W, the high end would be around 5W. If it’s closer to 1W at the low end then 10W would be the upper portion. Either way, it’s too low to compete in current mainstream notebooks, meaning that Bobcat is strictly a netbook/ultraportable core as AMD indicated in its slides. Eventually Bulldozer will probably scale down to take care of the mainstream mobile market.

AMD provided very little detail here other than it delivers 90% of today’s mainstream performance in less than half of the silicon area. If AMD views mainstream as an Athlon II X2, then Bobcat would deliver 90% of that performance in a die area of less than 60mm^2.

Clearly this is bigger than Atom, but that’s just a guess. Either way, the performance targets sound impressive. SSE1-3 are supported as well as hardware virtualization.

AMD wouldn’t tell me what process it would be made on but they did hint that Bobcat would be easily synthesizable. I take that to mean it will be built on a bulk 28nm process at Globalfoundries and not 32nm SOI.

Both of these cores will be out in 2011. We just need to make it through 2010 first.

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  • Zstream - Wednesday, November 11, 2009 - link

    Better then homosexual computing? We would not have baby Athlons if that be the case :D Reply
  • Denithor - Thursday, November 12, 2009 - link

    AMD chose to call those "baby Athlons" Bobcat... Reply
  • StormyParis - Wednesday, November 11, 2009 - link

    This is totally biased: whay doesn't this articale strat off with an Intel slide ? they always do ! stop the fanboism, Anand ^^ Reply
  • jav6454 - Wednesday, November 11, 2009 - link

    I like innovation, but deliverying by 2011 can make AMD fall behind from intel. Although by the look of these designs, AMD seems to have a better multithread solutionthan intel. Reply
  • webmastir - Wednesday, November 11, 2009 - link

    http://digg.com/hardware/AMD_Unveils_Bulldozer_Bob...">http://digg.com/hardware/AMD_Unveils_Bulldozer_Bob... Reply
  • Zstream - Wednesday, November 11, 2009 - link

    No Intel picture for the front page lol. Reply
  • Denithor - Thursday, November 12, 2009 - link

    Beat me to it! Reply
  • jaimeoc - Wednesday, November 11, 2009 - link

    I'm sorry but I'm not familiar with all this acronym fuzz.
    Anybody nows what the difference is between A-pipe and M-pipe in the Bobcat's slide? Can it be one specific pipe for add, one for mult?
    Reply
  • mczak - Thursday, November 12, 2009 - link

    That would certainly also be my interpretation. One mul and one add pipe hint to a similar design to current K10 - so seems like bobcat won't get the updated fpu from bulldozer (both pipes fmac capable) but get the same integer unit (however, only one instead of two) as bulldozer. Reply
  • mczak - Thursday, November 12, 2009 - link

    That would certainly also be my interpretation. One mul and one add pipe hint to a similar design to current K10 - so seems like bobcat won't get the updated fpu from bulldozer (both pipes fmac capable) but get the same integer unit (however, only one instead of two) as bulldozer. Reply

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