915 Motherboard Roundup: Socket 775 for the Rest of Us

ECS PF4 915P Extreme: Overclocking and Stress Testing

FSB Overclocking Results

Front Side Bus Overclocking Testbed
Processor:	Pentium 4 Prescott LGA 775 560 ES (2.8GHz-3.6GHz)
CPU Voltage:	1.425V (1.3875V default)
Cooling:	Thermaltake Jungle 502
Power Supply:	OCZ Power Stream 520
Maximum CPU OverClock:	222x18 (3996MHz) +11%
Maximum FSB OC:	237FSB x 14 (+19%)

It appears that ECS has implemented some means of getting around the overclock limits of the 915/925X, since we were able to reach 237 x14, or 19%, on the 915P Extreme. We also reached 222, an 11% overclock, at the stock ratio of 18X. While this is not nearly as good as the 260 to 300 overclocks that we achieved with the Asus, DFI, and MSI, it is still a big improvement over the 217 limit seen on many of the 915P boards.

This overclock level on the ECS reminds us of some of the early BIOS efforts that floated PCIe at boot to achieve higher overclocks. Manufacturers did not really get much higher than this until they began floating the PCIe by a variable table at boot. Perhaps that means that ECS can achieve even better overclocks with a BIOS update in the future. For now, we were pleased to see worthwhile performance increases achieved by overclocking one of the best values you can find in a 915P motherboard.

Memory Stress Test Results:

The memory stress test measures the ability of the ECS PF4 915P Extreme to operate at its officially supported memory frequency (533MHz DDR2), at the best performing memory timings that Crucial/Micron PC2-4300U will support. Memory stress testing was conducted by running DDR2 at 533MHz (stock 3:4 ratio) with 2 DIMM slots operating in Dual-Channel mode.

Stable DDR533 Timings - 2 DIMMs (2/4 DIMMs - 1 Dual-Channel Bank)
Clock Speed:	266MHz
Timing Mode:	3:4 (200:266 - Default)
CAS Latency:	3.0
Bank Interleave:	Auto
RAS to CAS Delay:	3
RAS Precharge:	3
Cycle Time (tRAS):	10*
Command Rate:	N/A

*SPD (Auto) timings for DDR2 are normally 4-4-4-12 at DDR2-533. A tRAS setting of 12 is normal. We ran a series of tests to measure memory bandwidth, and found that the tRAS setting made very little difference in the performance of DDR2. The most effective range of tRAS was 8 to 13 for DDR2 on the 925X chipset, so a tRAS of 10 was chosen for benchmarking.

The ECS performed as other boards in the 915 roundup did in being able to run with complete stability at 3-3-3-10 timings with two DDR2 DIMMs. The 915P Extreme was completely stable at these timings at the default 1.8V.

Filling all four available memory slots is more strenuous on the memory subsystem than testing 2 DDR2 modules on a motherboard.

Stable DDR533 Timings - 4 DIMMs (4/4 DIMMs - 2 Dual-Channel Banks)
Clock Speed:	266MHz
Timing Mode:	3:4 (200:266 - Default)
CAS Latency:	4.0
Bank Interleave:	Auto
RAS to CAS Delay:	3
RAS Precharge:	3
Cycle Time (tRAS):	10
Command Rate:	N/A

When all 4 DDR2 slots are filled, the ECS required slightly slower timings than with 2 DIMMs. As seen with many other 915 boards running DDR2 memory, CAS needed to be reduced to 4 for complete stability, although 4-3-3 timings were stable in our benchmarks with 4 DIMMs.