Intel Lunar Lake: New E-Core, Skymont Takes Flight For Peak Efficiency

Intel also opts for their Skymont E-cores, which are designed more for efficiency while maintaining a solid level of performance at a lower power envelope.

The Skymont cores feature a significantly broader decode architecture, with a 9-wide decode stage that includes 50% more decode clusters than previous generations. This is supported by a larger micro-op queue, which now holds 96 entries compared to 64 in the previous Crestmont E-Cores.

Intel has improved the out-of-order execution engine by boosting the allocation width from 4 to 8 and the retire width from 8 to 16. The next-gen Skymont core is supposed to surpass Crestmont E-Cores with double the allocation and retire width in terms of its ability to commit and run out-of-order instructions, decreasing overall latency and minimizing stalling for data dependencies.

Queuing and buffering capabilities have also been improved within the Skymont E-Core. It features a deeper reorder buffer of 416 entries, up from the previous 256, while Intel claims the size of the physical register files (PRF) and INT, MEM, and Vectors have been made deeper, too.

Focusing on dispatch ports, Intel has opted for a similar approach to Crestmont. This includes 26 dispatch ports, 8 integer ALUs, 3 Jump Ports, and 3 for load operations per cycle. Regarding Vector performance, Skymont supports 4x128-bit FP and SIMD vectors, which doubles gigaflops/TOPs and reduces latency for floating-point operations.

Intel does provide some figures highlighting Skymont's power efficiency and performance when compared directly to the Low Power Island E-Cores included on the SoC tile on Meteor Lake. In this particular line chart, Intel increases single-threaded performance by 1.7X while consuming just one-third of the power relative to Meteor Lake's LP E-cores.

Looking at multi-threaded performance, Intel puts Skymont 2.9X faster at 1/3rd of the power requirements when compared to Meteor Lake and the LP E-cores. It's worth noting that the Skymont E-Core cluster on the compute tile has double the cores of the Meteor Lake LP E-Core cluster (4 vs. 2), so performance is expected to be higher overall.

Due to their low-powered nature for mobile devices such as notebooks, the Skymont E-cores are designed to be very flexible, with some leverage over previous E-Core architectures. Compared to Raptor Cove, Skymont offers 2% better integer and floating-point performance in single-threaded workloads, with a power and thermal envelope almost identical to Raptor Cove. This is in a more desktop-friendly environment, as Intel does depict the data with the Skymont cores on an LLC or a Ring Bus. This is E-Cores versus the previous gen of P-Cores, in which Intel is claiming a 2% lead.

Intel's Skymont E-cores represent the next leap in Intel's architectural development. According to Intel's disclosure, Skymont looks to be a marked improvement in multiple areas over the previous Crestmont E-Core, including decoding, execution, memory subsystems, and power efficiency. While Intel discloses them as E-Cores, the messaging surrounding Skymont is a little confusing.

The easiest way to decipher this is that they are similar to the two LP E-Cores within the Meteor Lake SoC tile, but with Lunar Lake, they are in a cluster of four built onto the compute tile. On Lunar Lake, they will be as efficient as the LP E-cores of old, but for desktop, they will be in a cluster on the chips Ring Bus, meaning they will likely be similar to the traditional E-cores we've seen before with Intel's 14th/13th/12th Gen Core families.

Intel Lunar Lake: New P-Core, Enter Lion Cove New NPU: Intel NPU 4, Up to 48 Peak TOPS
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  • mode_13h - Thursday, June 6, 2024 - link

    The way I see it, the only defense Intel has for comparing Skymont to the LP Crestmont cores is to defend their decision not to include a separate LP version of Skymont, in Lunar Lake.

    In fact, I'll bet what happened is that someone internally made this pitch and the marketing goon who produced the public-facing slides for Lunar Lake opted to reuse that data, since it made Skymont look even better (it's already quite impressive)!
    Reply
  • kwohlt - Tuesday, June 4, 2024 - link

    The MTL E cores shared a ringbus with the P cores. The LNL E cores are completely separated from the P cores and function much more similarly to current LP-E cores Reply
  • name99 - Wednesday, June 5, 2024 - link

    So how much faster are they than the MTL E-cores (as opposed to the LP-E cores)?

    Sure it's nice that the dumbness of MTL is fixed, but the question is the one I'm interested in.
    Reply
  • mode_13h - Tuesday, June 4, 2024 - link

    So is L0D just a new name for what they previously called L1D? The two seem virtually identical, at least in terms of the information they disclosed. Reply
  • mode_13h - Tuesday, June 4, 2024 - link

    The thing they're *now* calling L1D is what seems to be the new part. Reply
  • Dante Verizon - Tuesday, June 4, 2024 - link

    AMD will be swimming ahead, how pathetic. Reply
  • lmcd - Monday, June 17, 2024 - link

    AMD doesn't build a package that competes with this product. If Intel delivers with Xe2 (and there's no reason to believe they will, to be clear), this product would win the entire handheld gaming category for the generation in about 30 seconds flat. Lunar Lake wouldn't actually be impossible to stuff into a phablet-style phone, though it obviously wouldn't be easy. Reply
  • kkilobyte - Tuesday, June 4, 2024 - link

    what about the i9-14900KS test redo with Intel Default settings? You told us 20 days ago that you'd redo them :

    Gavin Bonshor - Friday, May 10, 2024 - link
    Don't worry; I will be testing Intel Default settings, too. I'm testing over the weekend and adding them in.

    So, will this promise be ever fullfilled?
    Reply
  • kn00tcn - Tuesday, June 4, 2024 - link

    are you confirming that he chart images have not changed or were you waiting for an announcement? Reply
  • kkilobyte - Tuesday, June 4, 2024 - link

    Unless I'm mistaken, the charts don't seem to have changed, and include only a single set of data (without the Intel Default Settings). The text doesn't suggest they were, though I didn't read the whole article again, I admit. Reply

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