Matrox Millennium G400 & G400MAX

In AnandTech's original coverage of the Matrox G200, the first feature praised was the G200's 128-bit DualBus Architecture, a technology that was really much more than a marketing ploy. The success of the 128-bit DualBus Architecture inspired Matrox to make another quantum leap ahead of the quickly approaching competition with the new 256-bit DualBus Architecture (DBA), exclusive to the G400. The same analogy that applied to the G200's 128-bit DBA still applies to the 256-bit DBA, let's first take a look at what the 128-bit DBA did for the G200:

Imagine that you are on an 8-lane highway. The 8-lanes of this highway allow for more traffic to move from one end of it to the other, however there is a catch. The cars on the highway can only be moving in one direction at a time, meaning that all the cars must either be moving up the highway or down it but not both at the same time (all 8-lanes move in the same direction). Consider that the limited functionality of an internal 128-bit Data Bus when applied to video cards, on any given CPU clock cycle the data being transferred via the internal 128-bit Data Bus can only flow in one direction (to the graphics engine). On the following clock cycle the data can be transferred down the bus in the other direction (from the graphics engine). While this approach does have its benefits, when dealing with 2D images and bitmaps where the data that must be transferred down the bus remains quite small (less than 128-bits) there is a much more efficient way of approaching this.

Let's take that highway example from above, now instead of making that highway an 8-lane highway let's split it up into a 4-lane going and a 4-lane coming highway. Meaning that at the same time 4 lanes of cars can be traveling on the highway in the opposite direction of 4 lanes of cars on the other side of the highway (4 lanes can be leaving the city while 4 lanes can be entering). If there is no need for 8 lanes to be open for transportation in any one direction then the first 8-lane highway wouldn't be as efficient as this modified 4/4-lane highway. The same theory applies to the Matrox G200.

Instead of occupying the entire width of a 128-bit bus to transfer data in 64-bit chunks why not create a dual 64-bit setup with one bus dedicated to sending data to the graphics engine and the other dedicated to receiving data from it. This is what the G200's 128-bit DualBus architecture is, in essence it is 2 64-bit buses offering the same combined bandwidth as a single 128bit data bus while allowing for data to be sent in parallel to and from the graphics engine.

This time around, instead of splitting the 128-bit bus into two 64-bit buses, Matrox doubled the effective bandwidth by implementing dual 128-bit buses, making up a 256-bit I/O bus for transferring data between the G400's graphics engine and the memory buffers. Keep in mind that although the G400 features an internal 256-bit DBA, the external memory bus (bus connecting the G400 chip to the memory on the board itself) is still 128 bits wide. This brings up the need for extremely fast access to the memory, which is more than adequately taken care of using the 166/200MHz SDRAM on the G400/MAX.