The new Opteron 6300: Finally Tested!
by Johan De Gelas on February 20, 2013 12:03 AM ESTSAP S&D
The SAP S&D 2-Tier benchmark has always been one of my favorites. This is probably the most real world benchmark of all server benchmarks done by the vendors. It is a full blown application living on top of a heavy relational database. And don't forget that SAP is one of the most successful software companies out there, the undisputed market leader of Enterprise Resource Planning.
SAP is thus an application that misses the L2 cache much more than most applications out there, with the exception of some exotic HPC apps. We made an in depth profile of SAP S&D, but here is the summary:
- The application has very low instruction level parallelism (ILP) and as a result is not taxing the integer units much (IPC = 0.3-0.55, SPECint 2006: >1) .
- SAP misses the L2 cache much more than most applications out there (4 to 10 times more than SPECint2006 apps)
- The application has a relatively large but "prefetcheable" instruction footprint, which allows the prefetchers to reduce the instruction related cache misses
- The application has a massive and random data footprint, putting great pressure on the load subsystem. As a result the out of order engine has to hide the latency the best it can, and large ROB and load buffers help a lot. The latency of the memory subsystem matters.
The new Opteron does not boost SAP performance. A 6% clock increase translates into a 5% performance increase. As we discussed previously, SAP is one of the few complex server applications where the "Interlagos" Opteron performs a lot better than its predecessor. The application does not seem to benefit from any of the small improvements that the Piledrive core offers. Or maybe HP's benchmark team did not spend much time on this particular benchmark. Since the HP score is the only Interlagos score available, we have no other option than to wonder which of the two options is the closest to the truth.
Not that it matters much: the best SAP servers are Xeon E5 based. In this market of expensive consulting and software, $500 dollar savings on hardware is peanuts. So people tend to go for the best performance, and the Xeon E5 are clearly better at delivering raw SAP performance.
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sherlockwing - Wednesday, February 20, 2013 - link
These Piledriver based Opterons look competitive but the threat of Ivy-EP is immenient. The last time Intel die-shrunk their High end platform they introduced the monsterous 10 core Westmere-EP(the current Xeon E7 lineup), I wouldn't be surprised Ivy-EP introduces 10/12 core extreme E7 Xeons as well as Octa Xeons with better performance/watt.Kevin G - Wednesday, February 20, 2013 - link
Ivy Bridge-E is indeed coming but it is looking to be 6 months out. These Opterons were shipping since November which would give them a 10 month lead time. The real question for AMD is what they'll have in response in that time frame. Steamroller based parts all look to be released in 2014. On the bright side, AMD should be pairing those chips with a new socket as DDR4 becomes available.One thing though about Ivy Bridge-E is that it will also be a socket 2011 part so migration to it should get relatively quick in comparison to the Westmere-EP to Sandybridge-E transition. The same cost savings for OEM noted in this article for socket G32 Opterons will apply to Ivy Bridge-E this time around.
Oskars Apša - Wednesday, February 20, 2013 - link
Wasn't intels 2011 socket to be only physically identical, but electrically totally redesigned?Hrel - Friday, February 22, 2013 - link
"These Opterons were shipping since November"I reject this statement. Nothing counts as being "on the market" until Anandtech has done a full review of it. That's my stance and I'm sticking to it :P
Beenthere - Wednesday, February 20, 2013 - link
...is that the 63xx series is focused primarily on micro servers where it fits well. If the just disclosed Jaguar cores are any indication of AMD products to be released this and next year, I'd say AMD is back in the game in many PC and portable markets.The only thing Ivy Bridge has going for it is reduced power but at a price penalty.
JohanAnandtech - Thursday, February 21, 2013 - link
SeaMicro was indeed one of first to use Piledriver based cores, but I don't think the Opteron 6300 is meant to be a "typical" microserver CPU. Otherwise, AMD would have focused more on low power parts. This meant to be an update for the general server market.Jovec - Wednesday, February 20, 2013 - link
... as it is showing the multi-threaded chart instead.JohanAnandtech - Wednesday, February 20, 2013 - link
Fixed. Thanks for pointing it out, always appreciated.Death666Angel - Wednesday, February 20, 2013 - link
Hey!I get a " Page Not Found" error from the Racktivity PDU link. :)
ssj3gohan - Wednesday, February 20, 2013 - link
You say that AMDs bad implementation of C6 costs them in the energy efficiency tests, but AFAIK with a low of still 10% CPU the CPU should not enter ACPI C3 (Intel C6), it will probably stay in C1e providing there is still more than enough workload to do on each OS tick.If the xeons are observed to go into ACPI C3, then that is very probably a scheduler optimization specific for intel processors, not an actual implementation problem by AMD. Balancing C-state transitions - especially complete core sleep modes like ACPI C3 - is a notoriously hard task to do because each transition also costs a certain amount of mJ that, on immediate wake, are wasted compared to just leaving the cores in C1(e)